最后编辑于: 2011-09-25 00:33 | 分类: FPGA | 标签: 状态机 | 浏览数: 578 | 评论数: 0
本文是我的原创, 但时间已久远, 成文于2011.09.25
我学习VHDL时书上讲的VHDL状态机, 其状态码是用的是 如下:
type statetype is(state1,state2.... );
type定义的枚举类型.
这种枚举类型的缺点,大家都知道.
当我不想用默认的枚举类型的编码时, 比如想用独热码时, 怎么办呢?
有两种方法:
signal cur_state : std_logic_vector(3 downto 0);
constant state1 : std_logic_vector(3 downto 0) := "0001";
constant state2 : std_logic_vector(3 downto 0) := "0010";
......使用User-Defined Attributes的方法可以改变枚举类型的编码,
下面的描述摘自一本E文书中:
Example: Enumerated encoding.
A popular user-defined attribute, which is provided by synthesis tool vendors, is the
enum_encoding attribute. By default, enumerated data types are encoded sequentially.
Thus, if we consider the enumerated data type color shown below:
TYPE color IS (red, green, blue, white);
its states will be encoded as red = ‘‘00’’, green = ‘‘01’’, blue = ‘‘10’’, and white = ‘‘11’’.
Enum_encoding allows the default encoding (sequential) to be changed. Thus
the following encoding scheme could be employed, for example:
ATTRIBUTE enum_encoding OF color: TYPE IS "11 00 10 01";上面E文中提到了改变color这个枚举类型编码的方法, 我们当然可以将之运用在我们的state编码中.
个人感觉这种方法不直观, 不如第一种方法来的明了.
但是第一种的编码方法, 很多synthesis tool不能识别(妨碍了综合工具推断出状态机),
比如 Quartus自带的synthesis tool就不支持, 它支持枚举变量.
这样只能使用第二种方法,
在Quartus II Version 7.2 Handbook中有对这种方法的详细讲述,
在Volume 1 -- Section III. Synthesis -- 8. Quartus II Integrated Synthesis -- Quartus II Synthesis Options -- State Machine Processing (P8-34)
和 Manually Specifying State Assignments Using the syn_encoding Attribute(P8-35)
两节中,
其中有一个例子(P8-37), 如下, 很能说明问题,在quartus环境中照搬即可:
Example 8–23. Specifying User Encoded States with the syn_encoding Attribute in VHDL
ARCHITECTURE rtl OF my_fsm IS
TYPE count_state is (zero, one, two, three);
ATTRIBUTE syn_encoding : STRING;
ATTRIBUTE syn_encoding OF count_state : TYPE IS "11 01 10 00";
SIGNAL present_state, next_state : count_state;
BEGIN